Sr. Chiplet Hardware Architect

DAC Search Inc/Richard Goldstein specializes in Recruiting Services for Semiconductor, EDA, and Artificial Intelligence (AI) Chip companies, primarily startups
(Feel free to review my webpage www.richtherecruiter.com)

My current client is in Stealth Mode and Can be described as "Developing Foundational Technologies for Chiplet Based Semiconductor Design". They are an early-stage startup, pioneering technologies for the emerging multi-chiplet system-on-package paradigm. Their mission is to enable the next wave of growth in the semiconductor space, and we're looking for passionate individuals to join a seasoned and dynamic team.

Position Overview:
We are seeking a seasoned hardware designers in Santa Clara, CA / Austin, TX/ Bengaluru, India with a strong background in microarchitecture and RTL coding. The ideal candidate will play a key role in shaping our technology portfolio, bringing expertise and creativity to our solutions.

Key Responsibilities:
Design and develop microarchitectures for a set of highly configurable IPs.
RTL coding ensuring optimal performance, power, area.
Collaborate with software teams to define configuration requirements, verification collaterals etc.
Work with verification teams on assertions, test plans, debug, coverage etc.

Qualifications and preferred skills:
BS, MS in EE, CE, or CS
8+ years and current hands-on experience in microarchitecture and RTL development.
Proficiency in Verilog, SystemVerilog.
Familiarity with industry-standard EDA tools and methodologies.
Experience with high-speed pipelined designs and low power designs.
In-depth understanding of on-chip interconnects and NoCs.
In-depth knowledge of ARM AMBA protocols such as AXI, APB, and AHB.
Expertise in ARM CHI protocol.
Experience designing blocks such as Cache coherency, Cache, and memory subsystems.
Excellent problem-solving skills and attention to detail.
Strong communication and collaboration skills.

Greater San Jose/San Francisco Bay Area, Austin, TX + Bengaluru, India

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