Senior Test Engineer With Semi Conductor Testing - San Diego, Ca

Senior Test Engineer With Semi Conductor Testing - San Diego, Ca
Company:

Lorven Technologies, Inc.


Senior Test Engineer With Semi Conductor Testing - San Diego, Ca

Details of the offer

Our client is looking for a
Senior Test Engineer
for a
Long Term
project in
San Diego, CA
. Below is the detail requirement.

Job Title: Senior Test Engineer

Location: San Diego, CA

Duration: 12 Months

Job Description:

Bachelor's degree in Computer Science or equivalent. With a minimum of 8+ years of experience.

Requirements:

Test Engineer with a minimum of 5 years of experience in semiconductor testing.

Responsible for working with different teams for understanding the device datasheet and come up with a detailed Test procedure/plan to test the chip in ATE environment

Need to interact with the PCB design team for developing the necessary hardware Test load board, bench board, handler boards and probe cards

Should be responsible for developing the complete ATE test programs to validate the chip

Should involve in developing the test methodologies as required

Successful completion of projects within the scheduled time

Strong critical-thinking and problem-solving skills

Development and debug of test modules at both package and wafer level.

Correlation, customer acceptance and Project Release to Production

Expertise in one of the
Teradyne ETS364/ETS88/ETS800 ATE
platforms is mandatory

Expertise in the testing of
Power Management ICs
is mandatory

Experience in other ATE platforms will be an advantage

Team Management experience will be an advantage

Responsibilities:

Work with design/DFT team to develop the detailed test procedure from the device datasheet

Design and develop the required test hardware - Load board, bench board, Qualification board and probe card

Develop the ATE test program for device debug

First silicon verification and device bring up using ATE tools and bench equipment

Device characterization across temperature, voltage and process corners and validate the chip against the specification

Responsible for releasing the Final production quality test program to the customer (both wafer and package device test programs)

Qualify the test solution by performing GRR, Spike check, Failure simulation and Test Time optimization

Interactions with the Design/DFT team throughout the project execution

Interact with the customer on a day to day basis and provide a status update through e-mails and conference calls

Experience in test program release procedure at the production test house

Responsible from the beginning to the Final test/Wafer Test program release at customer site


Source: Dice


Area:

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